The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 2022

Filed:

Nov. 01, 2021
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Tom Altus, Plano, TX (US);

Karthik Subburaj, Karnataka, IN;

Sreekiran Samala, Plano, TX (US);

Raghu Ganesan, Karnataka, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 23/02 (2006.01); G01R 23/10 (2006.01); H03L 7/091 (2006.01);
U.S. Cl.
CPC ...
G01R 23/02 (2013.01); G01R 23/10 (2013.01); H03L 7/091 (2013.01);
Abstract

A method of frequency estimation. A clock output from a frequency synthesizer is received at an input of a ring encoder. The ring encoder generates outputs including a ring encoder output clock and an encoded output which represents LSBs of a clock cycle count of the clock output. A binary counter is run using the ring encoder output clock which provides an output count which represents MSBs of the clock cycle count. Using a reference clock, the encoded output is sampled to provide a sampled encoded output and the output count is sampled to provide a sampled output count. Error correcting is applied to the sampled encoded output to provide a corrected sampled encoded output. The corrected sampled encoded output and sampled output count are combined to provide a combined output which is used for estimating an instantaneous or average frequency of the clock output.


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