The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 25, 2022

Filed:

Mar. 22, 2021
Applicant:

Halo Microelectronics International, Campbell, CA (US);

Inventors:

Suming Lai, San Diego, CA (US);

Kenneth Chung-Yin Kwok, Irvine, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/07 (2006.01); H02M 1/088 (2006.01); H02J 7/34 (2006.01); H02J 7/06 (2006.01); H02H 7/12 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 1/088 (2013.01); H02H 7/1213 (2013.01); H02J 7/06 (2013.01); H02J 7/345 (2013.01); H02M 3/07 (2013.01); H02J 2207/20 (2020.01); H02M 1/0012 (2021.05);
Abstract

An apparatus includes a first gate drive transistor and a second gate drive transistor connected in series, a common node of the first gate drive transistor and the second gate drive transistor connected to a gate of a power switch, the second gate drive transistor configured as a bulk switch having a bulk terminal connected to a bulk terminal of the power switch, a first auxiliary transistor connected between the bulk terminal and a source of the power switch, a second auxiliary transistor coupled between the gate of the power switch and a system ground, and a third auxiliary transistor coupled between a logic control ground and the system ground, wherein the second auxiliary transistor and the third auxiliary transistor are configured to pull the gate of the power switch and the logic control ground down to the system ground in response to a turn off of the apparatus.


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