The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 18, 2022

Filed:

Aug. 18, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Parin Rajnikant Bhuta, Bangalore, IN;

Saikat Hazra, Bangalore, IN;

Sanjeeb Kumar Ghosh, Bangalore, IN;

Sushrant Monga, New Delhi, IN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 25/03 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03063 (2013.01); H04L 25/03057 (2013.01); H04L 25/03146 (2013.01); H04L 25/03267 (2013.01); H04L 25/03885 (2013.01); H04L 2025/0349 (2013.01); H04L 2025/03509 (2013.01);
Abstract

Accordingly embodiments herein disclose a quarter rate speculative DFE. The quarter rate speculative DFE includes a plurality of sampler circuits connected to an input terminal. The plurality of sampler circuits are configured to sample an input signal into a plurality of data samples in parallel. A plurality of quarter rate look ahead circuit connected to the plurality of sampler circuits. The plurality of quarter rate look ahead circuit is configured to simultaneously perform an align operation and a look ahead operation on the plurality of data samples based on the different clock phases to obtain a plurality of latched outputs. A plurality of multiplexers connected to the plurality of quarter rate look ahead circuit. The plurality of multiplexers is configured to generate two speculative data streams by multiplexing respective correction coefficients of each of the plurality of latched outputs.


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