The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 18, 2022

Filed:

May. 24, 2019
Applicant:

Google Llc, Mountain View, CA (US);

Inventors:

Xiang Zhou, Sunnyvale, CA (US);

Hong Liu, Palo Alto, CA (US);

Assignee:

Google LLC, Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 10/06 (2006.01); H04B 10/61 (2013.01);
U.S. Cl.
CPC ...
H04B 10/6165 (2013.01); H04B 10/6162 (2013.01);
Abstract

A low-power coherent receiver is enabled with enhanced performance for intra-datacenter reach optical interconnection applications using several techniques. The first is a coherent skew adjustment technique which enables lower-power baud-rate ADC sampling and baud-rate-spaced coherent equalization. The second is a real-valued or mixed-valued low-power coherent equalization technique, where a single-tap real-valued 4×4 MIMO equalizer plus four real-valued or two mixed-valued single-input single-out (SISO) equalizers are used for simultaneous polarization recovery, in-phase and quadrature (I/Q) phase error correction, and bandwidth equalization. The third is a power-efficient dual-DSP architecture to enhance coherent receiver performance, in which a complementary low-speed coherent DSP is introduced for optimal I/Q phase error correction and constellation decision parameters determination through more sophisticated algorithms that are too power hungry to be implemented in the primary high-speed DSP.


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