The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 18, 2022

Filed:

Jul. 13, 2020
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Robert Allan Neidorff, Bedford, NH (US);

Saurav Bandyopadhyay, Dallas, TX (US);

Ramanathan Ramani, Plano, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/158 (2006.01); H02M 1/08 (2006.01); H02M 3/157 (2006.01);
U.S. Cl.
CPC ...
H02M 3/158 (2013.01); H02M 1/08 (2013.01); H02M 3/157 (2013.01);
Abstract

In some examples, a system includes a voltage source terminal, a voltage reference terminal, a field effect transistor (FET), a current source, a comparator, and adjustment circuitry. The FET has a gate terminal and a non-gate terminal, the gate terminal coupled to the voltage source terminal. The current source is coupled to the non-gate terminal. The comparator has a comparator output and first and second comparator inputs, the first comparator input coupled to the non-gate terminal, and the second comparator input coupled to the voltage reference terminal. The adjustment circuitry has a circuitry input and a circuitry output, the circuitry input coupled to the comparator output, and the adjustment circuitry configured to adjust the circuitry output responsive to the circuitry input, in which the adjustment reduces a drive strength of the circuit.


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