The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 18, 2022

Filed:

Apr. 30, 2019
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Tae Hoon Yang, Yongin-Si, KR;

Ki Bum Kim, Yongin-Si, KR;

Jong Chan Lee, Yongin-Si, KR;

Woong Hee Jeong, Yongin-Si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/32 (2006.01); H01L 51/56 (2006.01); G09G 3/3233 (2016.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 27/3262 (2013.01); G09G 3/3233 (2013.01); H01L 51/56 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0809 (2013.01); G09G 2330/02 (2013.01); H01L 27/1251 (2013.01); H01L 2227/323 (2013.01);
Abstract

A pixel including: a light emitting element; a first transistor between a first node and the light emitting element to control current flowing from a first driving power source through the light emitting element to a second driving power source; a second transistor between a data line and the first transistor, and tamed on by a first scan signal; a third transistor between the first transistor and first node, and turned on by the first scan signal; and a fourth transistor between an initialization power line and the first node, and turned on by a second scan signal, wherein the fourth transistor is a tunneling field effect transistor including a source and drain area that are spaced apart from each other and have opposite conductivities, a channel area between the source area and drain area, and a gate electrode on the channel area with a gate insulating layer therebetween.


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