The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 2022
Filed:
Aug. 26, 2019
Applicant:
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Inventors:
Assignee:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/28 (2006.01); H01L 27/092 (2006.01); H01L 21/8238 (2006.01); H01L 29/51 (2006.01); H01L 21/8234 (2006.01); H01L 27/088 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28158 (2013.01); H01L 21/28088 (2013.01); H01L 21/823437 (2013.01); H01L 21/823462 (2013.01); H01L 21/823857 (2013.01); H01L 27/088 (2013.01); H01L 27/092 (2013.01); H01L 29/513 (2013.01); H01L 29/517 (2013.01); H01L 21/823828 (2013.01); H01L 29/4966 (2013.01);
Abstract
A method provides a gate structure for a plurality of components of a semiconductor device. A silicate layer is provided. In one aspect, the silicate layer is provided on a channel of a CMOS device. A high dielectric constant layer is provided on the silicate layer. The method also includes providing a work function metal layer on the high dielectric constant layer. A low temperature anneal is performed after the high dielectric constant layer is provided. A contact metal layer is provided on the work function metal layer.