The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 18, 2022

Filed:

Oct. 12, 2018
Applicant:

Marvell Asia Pte, Ltd., Singapore, SG;

Inventors:

Manan Salvi, Newton, MA (US);

Albert Ma, Belmont, MA (US);

Assignee:

MARVELL ASIA PTE, LTD., Singapore, SG;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/1045 (2016.01); G06F 12/0871 (2016.01); G06F 12/0868 (2016.01);
U.S. Cl.
CPC ...
G06F 12/1045 (2013.01); G06F 12/0868 (2013.01); G06F 12/0871 (2013.01);
Abstract

A method of translating a virtual address into a physical memory address in an ARM System Memory Management Unit version 3 (SMMUv3) system includes searching a Configuration Cache memory for a matching tag that matches an associated tag upon receiving the virtual address and the associated tag, and extracting, in a single memory lookup cycle, a matching data field associated with the matching tag when the matching tag is found in the Configuration Cache memory. A matching data field of the Configuration Cache memory includes a matching Stream Table Entry (STE) and a matching Context Descriptor (CD), both associated with the matching tag. The Configuration Cache memory may be configured as a content-addressable memory. The method further includes storing entries associated with a multiple memory lookup cycle virtual address-to-physical address translation into the Configuration Cache memory, each of the entries including a tag, an associated STE and an associated CD.


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