The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 18, 2022

Filed:

Aug. 23, 2017
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Hem C. Neema, San Jose, CA (US);

Sonal Santan, San Jose, CA (US);

Julian M. Kain, Longmont, CO (US);

Stephen P. Rozum, Loveland, CO (US);

Khang K. Dao, San Jose, CA (US);

Kyle Corbett, Campbell, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/10 (2006.01); G06F 13/10 (2006.01); G06F 13/28 (2006.01); G06F 13/16 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 1/10 (2013.01); G06F 13/102 (2013.01); G06F 13/1668 (2013.01); G06F 13/28 (2013.01); G06F 13/4068 (2013.01);
Abstract

An example computing system includes: a processing system, a hardware accelerator coupled to the processing system, and a software platform executing on the processing system. The hardware accelerator includes: a programmable integrated circuit (IC) configured with an acceleration circuit having a static region and a programmable region; a memory in the programmable IC configured to store metadata describing interface circuitry in at least one of the static region and the programmable region of the acceleration circuit. The software platform includes program code executable by the processing system to read the metadata from the memory of the hardware accelerator.


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