Semiconductor memory device capable of performing target refresh operation on active command basis and refresh command basis, and operating method thereof

Abstract

A semiconductor memory device includes a plurality of memory blocks including a plurality of word lines; a plurality of sense amplifying circuits, each being shared by adjacent memory blocks among the memory blocks; a refresh counter suitable for generating a counting address, a value of which increases according to a refresh command; an address storing circuit suitable for storing first and second target addresses by sampling an active address at different times; and a control circuit suitable for activating a word line corresponding to one of the counting address and the first target address according to the refresh command, and activating at least one word line corresponding to one or more of the active address and the second target address according to an active command.