The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 11, 2022

Filed:

Feb. 26, 2021
Applicant:

Untether Ai Corporation, Toronto, CA;

Inventors:

William Martin Snelgrove, Toronto, CA;

Jonathan Scobbie, Toronto, CA;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/80 (2006.01); G06F 9/38 (2018.01); G06F 9/30 (2018.01); G06F 1/32 (2019.01); G06N 3/04 (2006.01); G06N 3/08 (2006.01);
U.S. Cl.
CPC ...
G06F 15/8015 (2013.01); G06F 9/3001 (2013.01); G06F 9/30047 (2013.01); G06F 9/3887 (2013.01); G06F 1/32 (2013.01); G06N 3/04 (2013.01); G06N 3/08 (2013.01);
Abstract

A computing device includes an array of processing elements mutually connected to perform single instruction multiple data (SIMD) operations, memory cells connected to each processing element to store data related to the SIMD operations, and a cache connected to each processing element to cache data related to the SIMD operations. Caches of adjacent processing elements are connected. The same or another computing device includes rows of mutually connected processing elements to share data. The computing device further includes a row arithmetic logic unit (ALU) at each row of processing elements. The row ALU of a respective row is configured to perform an operation with processing elements of the respective row.


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