The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 11, 2022

Filed:

May. 23, 2017
Applicant:

Signify Holding B.v., Eindhoven, NL;

Inventors:

Yuhong Fang, Eindhoven, NL;

Mark Ciolek, Eindhoven, NL;

Harshitha Gudipati, Eindhoven, NL;

George Gruev, Eindhoven, NL;

Assignee:

SIGNIFY HOLDING B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/319 (2006.01); H05B 45/50 (2022.01); G01R 31/30 (2006.01); G01R 31/28 (2006.01); G01R 31/64 (2020.01); H05B 41/285 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31905 (2013.01); G01R 31/3004 (2013.01); G01R 31/31926 (2013.01); H05B 45/50 (2020.01); G01R 31/2884 (2013.01); G01R 31/64 (2020.01); H05B 41/2851 (2013.01);
Abstract

A method for detecting error on an input/output (IO) pin of an integrated circuit includes using the input/output pin of the integrated circuit in a first mode by receiving or sending a first value as analog data or digital data. The input/output pin is toggled in a test mode after each instance of using the input/output pin in the first mode. The test mode includes providing a second value disparate from the first value during a set time after using the input/output pin in the first mode, receiving back during the set time a resulting value based on providing the second value, measuring the resulting value, and identifying an error on the input/output pin of the integrated circuit based on the measured resulting value.


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