The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 2022

Filed:

Mar. 31, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventor:

Seok-jae Han, Seongnam-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/18 (2006.01); H05K 5/00 (2006.01); G06K 7/00 (2006.01); H05K 3/42 (2006.01); H05K 3/40 (2006.01); H05K 1/14 (2006.01);
U.S. Cl.
CPC ...
H05K 5/0069 (2013.01); G06K 7/0047 (2013.01); H05K 1/144 (2013.01); H05K 1/181 (2013.01); H05K 3/4007 (2013.01); H05K 3/425 (2013.01); H05K 2201/10159 (2013.01); H05K 2201/10515 (2013.01);
Abstract

A memory card comprising a first main surface and a second main surface opposing each other, and including a printed circuit board (PCB) constituting the first main surface, the PCB including a plurality of first external connection terminals, the plurality of first external connection terminals exposed on the first main surface, a plurality of memory devices stacked on the PCB, a memory controller configured to control the plurality of memory devices, a molding layer encapsulating the plurality of memory devices and the memory controller, the molding layer constituting the second main surface, and one or more second external connection terminals electrically connected to the memory controller, the one or more second external connection terminals embedded in the molding layer and exposed by the molding layer on the second main surface may be provided.


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