The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 2022

Filed:

Feb. 10, 2021
Applicant:

Asahi Kasei Microdevices Corporation, Tokyo, JP;

Inventor:

Shuntaro Fujii, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/51 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/265 (2006.01); H01L 21/28 (2006.01); H01L 21/3115 (2006.01); H01L 21/225 (2006.01);
U.S. Cl.
CPC ...
H01L 29/51 (2013.01); H01L 21/2253 (2013.01); H01L 21/26513 (2013.01); H01L 21/28035 (2013.01); H01L 21/28176 (2013.01); H01L 21/31155 (2013.01); H01L 29/42364 (2013.01); H01L 29/42376 (2013.01); H01L 29/4916 (2013.01); H01L 29/66492 (2013.01); H01L 29/7833 (2013.01);
Abstract

The semiconductor device includes a well region disposed in a surface layer of a semiconductor substrate, a source region and a drain region arranged separated from each other in a surface layer of the well region, a channel region disposed between the source region and the drain region, and a gate electrode disposed on the channel region via a gate insulating film containing fluorine, in which concentration of fluorine existing in a first interface, the first interface being an interface of the gate insulating film with the gate electrode, and concentration of fluorine existing in a second interface, the second interface being an interface of the gate insulating film with the channel region, are higher than concentration of fluorine existing in a middle region in the depth direction of the gate insulating film, and fluorine concentration in the first interface is higher than fluorine concentration in the second interface.


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