The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 2022

Filed:

Apr. 24, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Yong-Hoon Son, Yongin-si, KR;

Jae Hoon Kim, Seoul, KR;

Kwang-ho Park, Cheonan-si, KR;

Hyunji Song, Anyang-si, KR;

Gyeonghee Lee, Hwaseong-si, KR;

Seungjae Jung, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/11565 (2017.01); H01L 27/11573 (2017.01); H01L 27/1157 (2017.01); H01L 23/528 (2006.01); H01L 23/522 (2006.01); H01L 27/11582 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11573 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 27/1157 (2013.01); H01L 27/11565 (2013.01); H01L 27/11582 (2013.01);
Abstract

A semiconductor memory device is disclosed. The device includes a peripheral circuit structure on a substrate, a semiconductor layer on the peripheral circuit structure, an electrode structure on the semiconductor layer, the electrode structure including electrodes stacked on the semiconductor layer, a vertical channel structure penetrating the electrode structure and being connected to the semiconductor layer, a separation structure penetrating the electrode structure, extending in a first direction, and horizontally dividing the electrode of the electrode structure into a pair of electrodes, an interlayered insulating layer covering the electrode structure, and a through contact penetrating the interlayered insulating layer and being electrically connected to the peripheral circuit structure.


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