The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 2022

Filed:

May. 03, 2021
Applicant:

Analog Devices, Inc., Norwood, MA (US);

Inventors:

Javier A. Salcedo, North Billerica, MA (US);

Andrew Lewine, Arlington, MA (US);

Assignee:

ANALOG DEVICES, INC., Norwood, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/092 (2006.01); H01C 7/12 (2006.01); H01L 27/02 (2006.01); H01L 29/87 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0921 (2013.01); H01C 7/12 (2013.01); H01L 27/0262 (2013.01); H01L 29/87 (2013.01);
Abstract

Electrical overstress protection for high speed applications is provided. In certain embodiments, a method of distributed and customizable electrical overstress protection for a semiconductor die is provided. The method includes configuring a heterogeneous overstress protection array that includes a customizable forward protection circuit electrically connected between a power high pad, a power low pad, and a signal pad and distributed across the semiconductor die, including selecting a number of segmented overstress protection devices from a plurality of available overstress protection devices of the customizable protection circuit. The method also includes choosing a device type of the selected segmented overstress protection devices from amongst two or more different device types providing complementary protection characteristics and protecting a core circuit from electrical overstress using the selected segmented overstress protection devices, the core circuit electrically connected to at least the signal pad, the power high pad, and the power low pad.


Find Patent Forward Citations

Loading…