The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 04, 2022
Filed:
Jun. 30, 2020
Applicant:
SK Hynix Inc., Icheon-si, KR;
Inventor:
Hee Joo Lee, Icheon-si, KR;
Assignee:
SK hynix Inc., Icheon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/24 (2006.01); G11C 16/08 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
G11C 16/24 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01);
Abstract
A semiconductor memory device, and a method of operation, include: a memory block coupled with a plurality of word lines and a plurality of bit lines; a peripheral circuit configured to perform a program operation and a read operation on the memory block; and control logic configured to control the peripheral circuit such that a word line overdrive period overlaps with a bit line overdrive period in a bit line precharge operation during at least one of the program operation and the read operation.
Quick Actions:
Lee, Hee. (2022). Semiconductor memory device reducing bit line precharge operation time and method of operating the same (U.S. Patent No. 11462274). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11462274
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile