The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 2022

Filed:

Mar. 29, 2019
Applicant:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Inventor:

Mark Fowler, Boxborough, MA (US);

Assignee:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06F 12/10 (2016.01); G06F 9/30 (2018.01); G11C 7/22 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0659 (2013.01); G06F 3/0604 (2013.01); G06F 3/0673 (2013.01); G06F 12/10 (2013.01); G06F 9/3004 (2013.01); G06F 2212/657 (2013.01); G11C 7/1006 (2013.01); G11C 7/22 (2013.01);
Abstract

A processing unit is configured to access a first memory that supports atomic operations and a second memory via an interface. The second memory or the interface does not support atomicity of the atomic operations. A trap handler is configured to trap atomic operations and enforce atomicity of the trapped atomic operations. The processing unit selectively provides atomic operations to the trap handler in response to detecting that memory access requests in the atomic operations are directed to the second memory via the interface. In some cases, the processing unit detects a frequency of traps that result from atomic operations that include memory access requests to a page stored in the second memory. The processing unit transfers the page from the second memory to the first memory in response to the trap frequency exceeding a threshold.


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