The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 27, 2022

Filed:

Sep. 22, 2020
Applicant:

Nxp B.v., San Jose, CA (US);

Inventors:

Klaas-Jan de Langen, Bergschenhoek, NL;

Antonius Martinus Jacobus Daanen, Beuningen, NL;

Frederik van den Ende, Apeldoorn, NL;

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0185 (2006.01); H03K 3/356 (2006.01); H03K 19/003 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018528 (2013.01); H03K 3/356113 (2013.01); H03K 19/00384 (2013.01); H03K 19/018507 (2013.01); H03K 19/018521 (2013.01);
Abstract

An apparatus comprising a first voltage domain circuit including a first circuit component configured to provide a first digital output signal; a second voltage domain circuit comprising a second circuit component; a level shifter arrangement configured to receive the first digital output signal and generate a second digital output signal based thereon with an increased voltage level of the high state, and provide said second digital output signal to the second circuit component; wherein the level shifter arrangement comprises at least one stage, the at least one stage comprising an arrangement of one or more diode-connected PMOS transistors, coupled to a CMOS inverter arrangement; the CMOS inverter arrangement of a first of the at least one stages configured to receive the first digital output signal and the CMOS inverter arrangement of a final stage of the at least one stages configured to output said second digital output signal.


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