The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 27, 2022

Filed:

Jan. 22, 2021
Applicant:

Denso Corporation, Kariya, JP;

Inventors:

Kosuke Kamiya, Kariya, JP;

Ryota Tanabe, Kariya, JP;

Tomohisa Sano, Kariya, JP;

Takuo Nagase, Kariya, JP;

Hiroshi Ishino, Kariya, JP;

Shoichiro Omae, Kariya, JP;

Assignee:

DENSO CORPORATION, Kariya, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/48 (2006.01); H01L 23/34 (2006.01); H01L 21/00 (2006.01); H05K 5/02 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 25/07 (2006.01); H01L 25/18 (2006.01); H01L 21/48 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49537 (2013.01); H01L 21/4871 (2013.01); H01L 23/3185 (2013.01); H01L 23/49541 (2013.01); H01L 23/49575 (2013.01); H01L 24/40 (2013.01); H01L 24/49 (2013.01); H01L 25/0655 (2013.01); H01L 25/072 (2013.01); H01L 25/18 (2013.01); H01L 2224/40137 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/183 (2013.01);
Abstract

A semiconductor device configures one arm of an upper-lower arm circuit, and includes: a semiconductor element that includes a first main electrode and a second main electrode, wherein a main current between the first main electrode and the second main electrode; and multiple main terminals that include a first main terminal connected to the first main electrode and a second main terminal connected to the second main electrode. The first main terminal and the second main terminal are placed adjacent to each other; A lateral surface of the first main terminal and a lateral surface of the second main terminal face each other in one direction orthogonal to a thickness direction of the semiconductor element.


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