The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 27, 2022

Filed:

Oct. 01, 2020
Applicant:

Arm Limited, Cambridge, GB;

Inventors:

Yasuo Ishii, Austin, TX (US);

James David Dundas, Austin, TX (US);

Chang Joo Lee, Austin, TX (US);

Muhammad Umar Farooq, Austin, TX (US);

Assignee:

Arm Limited, Cambridge, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0864 (2016.01); G06F 12/121 (2016.01); G06F 12/0873 (2016.01); G06F 12/0811 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0864 (2013.01); G06F 12/0811 (2013.01); G06F 12/0873 (2013.01); G06F 12/121 (2013.01);
Abstract

An apparatus comprises first-level and second-level set-associative caches each comprising the same number of sets of cache entries. Indexing circuitry generates, based on a lookup address, a set index identifying which set of the first-level set-associative cache or the second-level set-associative cache is a selected set of cache entries to be looked up for information associated with the lookup address. The indexing circuitry generates the set index using an indexing scheme which maps the lookup address to the same set index for both the first-level set-associative cache and the second-level set-associative cache. This can make migration of cached information between the cache levels more efficient, which can be particularly useful for caches with high access frequency, such as branch target buffers for a branch predictor.


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