The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 27, 2022

Filed:

Feb. 09, 2021
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Ran Zamir, Ramat Gan, IL;

Omer Fainzilber, Herzliya, IL;

David Avraham, Even Yehuda, IL;

Eran Sharon, Rishon Lezion, IL;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G06F 11/10 (2006.01); H03M 13/45 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); H03M 13/45 (2013.01);
Abstract

A memory controller including, in one implementation, a memory interface and a control circuit. The memory interface is configured to receive a punctured codeword read from a non-volatile memory. The control circuit is configured to determine error probability values for a plurality of check nodes associated with a punctured bit included in the punctured codeword. The control circuit is also configured to determine an error probability value for the punctured bit based on the error probability values for the plurality of check nodes associated with the punctured bit and a variable degree associated with the punctured bit. The control circuit is further configured to determine a log likelihood ratio (LLR) value for the punctured bit based on the error probability value for the punctured bit. The control circuit is also configured to decode the punctured codeword using the LLR value for the punctured bit.


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