The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2022

Filed:

Jun. 22, 2021
Applicant:

Realtek Semiconductor Corporation, Hsinchu, TW;

Inventors:

Shih-Hsiung Huang, Hsinchu, TW;

Wei-Chou Wang, Hsinchu, TW;

Chun-Hsiung Chang, Hsinchu, TW;

Shun-Ta Wu, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/00 (2006.01); H03M 1/12 (2006.01); G11C 27/02 (2006.01); H03M 1/38 (2006.01);
U.S. Cl.
CPC ...
H03M 1/1245 (2013.01); G11C 27/02 (2013.01); H03M 1/38 (2013.01);
Abstract

Disclosed is a sample and hold circuit and method capable of amplifying an input signal. The method includes: in a sample phase, receiving a first (second) input signal with top electrodes of first (second) capacitors, and receiving the second (first) input signal with all bottom electrode(s) of at least a part of the first (second) capacitors; in a hold phase, stopping receiving the first (second) input signal with the top electrodes of the first (second) capacitors, and receiving a first (second) group of reference signals with the bottom electrodes of the first (second) capacitors, so that the first (second) capacitors provide a first (second) sample voltage on the top electrodes of the multiple first (second) capacitors through charge redistribution, wherein the first and second input signals are a pair of differential signals and they are opposite to each other.


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