The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2022

Filed:

Dec. 29, 2020
Applicant:

Vanguard International Semiconductor Corporation, Hsinchu, TW;

Inventors:

Cheng-Wei Chou, Taoyuan, TW;

Hsiu-Ming Wu, New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/778 (2013.01); H01L 29/66462 (2013.01);
Abstract

A method of forming a semiconductor device includes: providing a substrate, wherein a buffer layer, a channel layer, and a barrier layer are sequentially formed on the substrate; forming a doped compound semiconductor layer on a portion of the barrier layer; forming a first etch stop layer on the doped compound semiconductor layer; forming a second etch stop layer on the first etch stop layer; forming a first dielectric layer on the second etch stop layer; forming an etch protection layer on the first dielectric layer; performing a first etch process to form a recess in the first dielectric layer; performing a second etch process to form an opening exposing a portion of the second etch stop layer; performing a removal process to remove remaining portions of the etch protection layer on the first dielectric layer; and forming a gate metal layer to fill the opening.


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