The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2022

Filed:

Jul. 01, 2020
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Yoshinobu Tanaka, Yokkaichi, JP;

Koichi Ito, Yokkaichi, JP;

Hideaki Hasegawa, Yokkaichi, JP;

Akihiro Tobioka, Yokkaichi, JP;

Sung Tae Lee, Yokkaichi, JP;

Assignee:

SANDISK TECHNOLOGIES LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11556 (2017.01); H01L 27/11519 (2017.01); H01L 27/11565 (2017.01); H01L 27/11582 (2017.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 27/11529 (2017.01); H01L 21/311 (2006.01); H01L 27/11573 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11556 (2013.01); H01L 21/76816 (2013.01); H01L 21/76831 (2013.01); H01L 23/5226 (2013.01); H01L 27/11519 (2013.01); H01L 27/11565 (2013.01); H01L 27/11582 (2013.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01); H01L 27/11529 (2013.01); H01L 27/11573 (2013.01);
Abstract

An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory openings and support openings are formed through the alternating stack, and memory opening fill structures and support pillar structures are formed in the memory openings and in the support openings, respectively. Via cavities extending to each of the sacrificial material layers are formed through the alternating stack without forming any stepped surfaces in the alternating stack. The via cavities may be formed in areas that do not overlap with the support pillar structures, or in areas that include at least one support pillar structure. Sacrificial via fill structures are formed in the via cavies, and the sacrificial material layers are replaced with electrically conductive layers. The sacrificial via fill structures are removed, and a combination of a tubular dielectric spacer and a contact via structure can be formed in the via cavities.


Find Patent Forward Citations

Tanaka, Yoshinobu. (2022). Three-dimensional memory device including stairless word line contact structures for and method of making the same (U.S. Patent No. 11450679). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11450679

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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