The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 20, 2022
Filed:
Jul. 28, 2020
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventor:
Sebastian Brunner, Deutschlandsberg, AT;
Assignee:
Qualcomm Incorporated, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/15 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 21/4853 (2013.01); H01L 21/4857 (2013.01); H01L 21/4867 (2013.01); H01L 21/565 (2013.01); H01L 23/15 (2013.01); H01L 23/3128 (2013.01); H01L 23/49822 (2013.01); H01L 23/49866 (2013.01); H01L 24/16 (2013.01); H01L 2224/16227 (2013.01);
Abstract
A package that includes an integrated device, a substrate coupled to the integrated device, and an encapsulation layer coupled to the substrate. The encapsulation layer encapsulates the integrated device. The substrate includes at least one dielectric layer, a plurality of interconnects located in the at least one dielectric layer, wherein at least one of the interconnects has a rectangular side cross-section having at least one corner with a corner radius less than a corner radius threshold.