The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 20, 2022
Filed:
Jul. 08, 2021
Applicant:
SK Hynix Inc., Icheon-si, KR;
Inventors:
Soo Hwan Kim, Icheon-si, KR;
Mi Hyun Hwang, Icheon-si, KR;
Assignee:
SK hynix Inc., Icheon-si Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/02 (2006.01); G11C 29/00 (2006.01); G11C 29/42 (2006.01); G11C 7/12 (2006.01); G11C 7/10 (2006.01); G11C 29/44 (2006.01);
U.S. Cl.
CPC ...
G11C 29/789 (2013.01); G11C 7/1039 (2013.01); G11C 7/12 (2013.01); G11C 29/022 (2013.01); G11C 29/42 (2013.01); G11C 29/4401 (2013.01); G11C 29/787 (2013.01);
Abstract
A memory device includes an at least one first normal mat and an at least one second normal mat, a first redundancy mat configured to provide one or more first redundancy column lines for repairing one or more column lines disposed in the at least one first normal mat, a second redundancy mat configured to provide one or more second redundancy column lines for repairing one or more column lines disposed in the at least one second normal mat, and a redundancy segmented input/output (I/O) line coupled to both of the first redundancy mat and the second redundancy mat.