The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 20, 2022
Filed:
Apr. 01, 2021
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Colin Beaton Verrilli, Apex, NC (US);
Matthew Severson, Austin, TX (US);
Assignee:
QUALCOMM Incorporated, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/3287 (2019.01); G01R 21/133 (2006.01); G06F 1/3296 (2019.01); G06F 1/324 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01); G01R 21/133 (2013.01); G06F 1/324 (2013.01); G06F 1/3296 (2013.01);
Abstract
In each of two or more pipelined subsystems, the relative amount of time that the processing cores are idle may be determined. If the idle ratio is below a threshold, the clock frequency and voltage may be adjusted using dynamic clock and voltage scaling (DCVS) based on a power limit. However, if the idle ratio exceeds the threshold, the clock frequency and voltage may be decreased without regard to the power limit.