The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2022

Filed:

May. 16, 2019
Applicants:

Ordos Yuansheng Optoelectronics Co., Ltd., Inner Mongolia, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Lei Yao, Beijing, CN;

Dawei Shi, Beijing, CN;

Wentao Wang, Beijing, CN;

Lu Yang, Beijing, CN;

Haifeng Xu, Beijing, CN;

Lei Yan, Beijing, CN;

Jinfeng Wang, Beijing, CN;

Jinjin Xue, Beijing, CN;

Fang Yan, Beijing, CN;

Xiaowen Si, Beijing, CN;

Lin Hou, Beijing, CN;

Zhixuan Guo, Beijing, CN;

Yuanbo Li, Beijing, CN;

Xiaofang Li, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/14 (2006.01); G02F 1/136 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
G02F 1/13606 (2021.01); G02F 1/13629 (2021.01); G02F 1/13685 (2021.01); G02F 1/136209 (2013.01); G02F 1/136218 (2021.01); G02F 1/136295 (2021.01); H01L 27/124 (2013.01); H01L 27/1222 (2013.01); H01L 27/1259 (2013.01);
Abstract

An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate; a plurality of gate lines on a side of the base substrate; a plurality of data lines on a side of the plurality of gate lines away from the base substrate and intersecting with the plurality of gate lines; and a plurality of light shielding metal portions between the base substrate and each of the plurality of gate lines; respective one of the gate lines includes a plurality of gate line sub-segments separated by the plurality of data lines, respectively, every two adjacent gate line sub-segments in the respective one of the gate lines correspond to one of the light shielding metal portions, and the every two adjacent gate line sub-segments are connected in series through the one of the light shielding metal portions.


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