The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2022

Filed:

May. 26, 2020
Applicant:

Foshan Nationstar Optoelectronics Co., Ltd., Foshan, CN;

Inventors:

Qiang Zhao, Foshan, CN;

Kuai Qin, Foshan, CN;

Heng Guo, Foshan, CN;

Changqi Wang, Foshan, CN;

Zongxian Xie, Foshan, CN;

Kailiang Fan, Foshan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
F21V 33/00 (2006.01); F21V 19/00 (2006.01); H01L 25/065 (2006.01); H01L 23/02 (2006.01); H01L 23/28 (2006.01); H01L 33/48 (2010.01); H01L 33/52 (2010.01); F21Y 105/12 (2016.01); F21Y 113/13 (2016.01); F21Y 115/10 (2016.01);
U.S. Cl.
CPC ...
F21V 33/0096 (2013.01); F21V 19/002 (2013.01); H01L 23/02 (2013.01); H01L 23/28 (2013.01); H01L 25/0655 (2013.01); H01L 33/483 (2013.01); H01L 33/52 (2013.01); F21Y 2105/12 (2016.08); F21Y 2113/13 (2016.08); F21Y 2115/10 (2016.08);
Abstract

A blade assembly and a fan display including the same. The blade assembly includes a circuit substrate provided in an elongated shape, a lamination board provided in an elongated shape and bonded to the circuit substrate by a laminating glue, and a plurality of light emitting diode (LED) light emitting units. A mounting hole is defined in the lamination board and passes through a thickness of the lamination board. The circuit substrate has a first side attached to the lamination board, the first side and the mounting hole jointly defining a mounting cavity, in which plurality of LED light emitting units are hermetically disposed in the mounting cavity, and are arranged at intervals along a length of the circuit substrate.


Find Patent Forward Citations

Loading…