The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 2022

Filed:

May. 08, 2020
Applicant:

Plantronics, Inc., Santa Cruz, CA (US);

Inventor:

Jian Wang, Burnaby, CA;

Assignee:

PLANTRONICS, INC., Santa Cruz, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01); H04N 21/44 (2011.01); H04N 21/43 (2011.01); H04N 21/234 (2011.01); H04N 21/238 (2011.01);
U.S. Cl.
CPC ...
H04N 21/44004 (2013.01); H04N 21/23406 (2013.01); H04N 21/23805 (2013.01); H04N 21/4305 (2013.01);
Abstract

Correcting encode bit rate errors developed by a hardware encoder with an outer software rate adjustment loop. The rate adjustment loop maintains a VBV (video buffering verifier) buffer model. When VBV buffer fullness is over a threshold, the rate adjustment loop drops frames. If below the threshold, periodically a rate adjustment analysis performed. If a number of frames above a threshold have been dropped, the hardware encoder bit rate is decreased. A leaky bucket is checked to determine in bits and out bits. If the number of in bits exceeds the number of out bits times a multiplier, the hardware encoder bit rate is decreased. If the number of in bits times a multiplier is less than the number of out bits, the hardware encoder bit rate is increased. Dropping frames on buffer condition provides shorter term correction and adjustment of the hardware encoder bit rate provides longer term correction.


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