The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 13, 2022
Filed:
Dec. 18, 2020
Applicant:
Tdk Corporation, Tokyo, JP;
Inventor:
Wolfgang Pahl, Munich, DE;
Assignee:
TDK Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 21/563 (2013.01); H01L 23/3171 (2013.01); H01L 23/3185 (2013.01); H01L 23/49816 (2013.01); H01L 23/49894 (2013.01); H01L 24/14 (2013.01); H01L 24/81 (2013.01); H01L 2224/14 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/8185 (2013.01); H01L 2924/1461 (2013.01);
Abstract
An electronic device with stud bumps is disclosed. In an embodiment an electronic device includes a carrier board having an upper surface and an electronic chip mounted on the upper surface, the electronic chip having a mounting side facing the upper surface of the carrier board, a top side facing away from the upper surface, and sidewalls connecting the mounting side to the top side, wherein the electronic chip has equal to or less than 5 stud bumps per square millimeter of a base area of the mounting side, wherein the carrier board has at least one recess in the upper surface, and wherein at least one of the stud bumps reaches into the recess.