The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 2022

Filed:

Sep. 02, 2021
Applicant:

Lg Display Co., Ltd., Seoul, KR;

Inventors:

Yewon Hong, Paju-si, KR;

TaeWoong Moon, Paju-si, KR;

JunHyeon Bae, Paju-si, KR;

Yeonkyung Kim, Paju-si, KR;

Yeonwoo Shin, Paju-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/20 (2006.01);
U.S. Cl.
CPC ...
G09G 3/20 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0214 (2013.01); G09G 2330/028 (2013.01);
Abstract

A display device having a gate driver, which may reduce a leakage current of a TFT and power consumption, is disclosed. Each stage of the gate driver comprises an output portion including a pull-up transistor outputting a corresponding clock of a plurality of clocks as a gate signal in response to control of a Q node, and a pull-down transistor outputting a first gate-off voltage as an off-voltage of a gate signal in response to control of a QB node; a controller charging and discharging the Q node and charging and discharging the QB node to be in an opposite state of the Q node; and a back bias circuit having a back bias node capacitance-coupled with the Q node and generating a second gate-off voltage lower than the first gate-off voltage to apply the second gate-off voltage to the back bias node for an off-period of the Q node, wherein the back bias circuit may apply the back gate bias voltage to light shielding layers of some transistors, which are turned off for the off-period of the Q node, among transistors constituting the output portion and the controller, through the back bias node, thereby reducing or minimizing a leakage current of the corresponding transistors.


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