The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 2022

Filed:

Jun. 10, 2020
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Gaurav Kumar Verma, Fremont, CA (US);

Saikat Bandyopadhyay, San Jose, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/26 (2006.01); G06F 9/44 (2018.01); G06F 30/331 (2020.01); G06F 16/901 (2019.01); G06F 9/30 (2018.01); G06F 9/46 (2006.01); G06F 16/22 (2019.01); G06F 16/955 (2019.01); G06F 16/23 (2019.01); G06F 16/9535 (2019.01); G06F 16/951 (2019.01); G06F 9/4401 (2018.01); G06F 16/28 (2019.01); G06F 9/54 (2006.01);
U.S. Cl.
CPC ...
G06F 30/331 (2020.01); G06F 9/30036 (2013.01); G06F 9/463 (2013.01); G06F 16/9017 (2019.01); G06F 9/44 (2013.01); G06F 9/4406 (2013.01); G06F 9/547 (2013.01); G06F 16/22 (2019.01); G06F 16/23 (2019.01); G06F 16/2379 (2019.01); G06F 16/285 (2019.01); G06F 16/951 (2019.01); G06F 16/955 (2019.01); G06F 16/9535 (2019.01);
Abstract

Simulation of a circuit design using accelerated models can include determining, using computer hardware, that a design unit of a circuit design specified in a hardware description language is a prime block and determining, using the computer hardware, an output vector corresponding to an output of the prime block. Using the computer hardware, contents of the prime block can be replaced with an accelerated simulation model specified in a high level language, wherein the accelerated simulation model can determine a value for the output of the prime block as a function of values of one or more inputs of the prime block using the output vector. Using the computer hardware, the circuit design can be elaborated and compiled into object code that is executable to simulate the circuit design.


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