The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 2022

Filed:

Feb. 06, 2021
Applicant:

Skyechip Sdn Bhd, Bayan Lepas Pulau Pinang, MY;

Inventors:

Chee Hak Teh, Bayan Lepas Pulau Pinang, MY;

Soon Chieh Lim, Bayan Lepas Pulau Pinang, MY;

Assignee:

SKYECHIP SDN BHD, Bayan Lepas, MY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01); G01R 31/317 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1668 (2013.01); G01R 31/31724 (2013.01); G06F 13/4027 (2013.01);
Abstract

A memory sequencer system for external memory protocols including a control center and a microcontroller; a control center network-on-chip having nodes connected point-to-point to synchronize and co-ordinate communication; whereby a command and address sequencer to generate command, control and address commands for specific memory protocols; and at least one data sequencer to generate pseudo-random or deterministic data patterns for each byte lane of a memory interface; wherein said command and address sequencer and said data sequencer are chained to form complex address and data sequences for memory interface training, calibrating and debugging; wherein said control center network-on-chip interconnecting the control center with said command and address sequencer and data sequencer to provide firmware controllability.


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