The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 06, 2022
Filed:
Nov. 24, 2020
Applicant:
Applied Materials, Inc., Santa Clara, CA (US);
Inventors:
Qintao Zhang, Mt Kisco, NY (US);
Samphy Hong, Saratoga Springs, NY (US);
David J. Lee, Poughkeepsie, NY (US);
Jason Appell, Albany, NY (US);
Assignee:
Applied Materials, Inc., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/16 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 21/02 (2006.01); H01L 21/203 (2006.01); H01L 21/8234 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/6653 (2013.01); H01L 21/203 (2013.01); H01L 21/823493 (2013.01); H01L 29/4236 (2013.01); H01L 29/6656 (2013.01);
Abstract
Disclosed herein are methods for forming split-gate MOSFETs including a gate shield. In some embodiments, a method may include providing a device structure including a well formed in an epitaxial layer, forming a set of trenches through the well and the epitaxial layer, implanting the device structure to form a gate shield layer at a bottom of each of the set of trenches, and forming a gate spacer layer over the device structure including within the set of trenches.