The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2022

Filed:

Aug. 07, 2020
Applicant:

Kioxia Corporation, Minato-ku, JP;

Inventors:

Kosei Noda, Yokkaichi, JP;

Go Oike, Yokkaichi, JP;

Assignee:

Kioxia Corporation, Minato-ku, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/11524 (2017.01); H01L 27/11551 (2017.01); H01L 27/1157 (2017.01); H01L 27/11565 (2017.01); H01L 27/11519 (2017.01); H01L 27/11578 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11551 (2013.01); H01L 27/1157 (2013.01); H01L 27/11519 (2013.01); H01L 27/11524 (2013.01); H01L 27/11565 (2013.01); H01L 27/11578 (2013.01);
Abstract

A semiconductor memory device includes a substrate, a first stack, a plurality of first columnar portions, a second stack, a plurality of second columnar portions, and a third stack. In the first stack, first conductive layers and first insulating layers are alternately stacked in a thickness direction of the substrate. Each of the plurality of first pillars extends inside the first stack in the thickness direction. In the second stack, second conductive layers and second insulating layers are alternately stacked in the thickness direction. Each of the plurality of second pillars extends inside the second stack in the thickness direction. The third stack is positioned between the first stack and the second stack in the first direction. In the third stack, third insulating layers and fourth insulating layers including a material different from a material of the third insulating layer are alternately stacked in the thickness direction of the substrate.


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