The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2022

Filed:

Apr. 12, 2021
Applicant:

Nanya Technology Corporation, New Taipei, TW;

Inventors:

Jr-Chiuan Wang, New Taipei, TW;

Rou-Wei Wang, Taipei, TW;

Wei-Yu Chen, Miaoli County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10885 (2013.01); H01L 27/10808 (2013.01); H01L 27/10823 (2013.01); H01L 27/10855 (2013.01); H01L 27/10876 (2013.01); H01L 27/10888 (2013.01); H01L 27/10897 (2013.01);
Abstract

The present disclosure provides a semiconductor memory device and a method for manufacturing the semiconductor memory device. The method includes steps of: providing a substrate including a storage area and a peripheral area, wherein the storage area has a contact plug, a bit line structure adjacent to the contact plug, an air gap between the bit line structure and the contact plug, a barrier layer conformally overlaying the bit line structure, and a landing pad above the barrier layer; forming a trench between the storage area and the peripheral area; filling the trench with a nitride material; forming a first oxide layer above the nitride material in the trench and on the landing pad; forming a nitride layer above the first oxide layer; and forming a second oxide layer above the nitride layer.


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