The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2022

Filed:

Jul. 14, 2020
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventors:

Hideo Kobayashi, Tokyo, JP;

Daisuke Yoshida, Ebina, JP;

Fumihiro Inui, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N 5/369 (2011.01); H04N 5/378 (2011.01); H04N 5/359 (2011.01); H01L 27/146 (2006.01);
U.S. Cl.
CPC ...
H04N 5/3698 (2013.01); H04N 5/3598 (2013.01); H04N 5/378 (2013.01); H04N 5/379 (2018.08); H01L 27/14634 (2013.01); H01L 27/14636 (2013.01);
Abstract

Photoelectric conversion device includes stacked first and second substrates. The first substrate includes pixel array, first joint portion arranged in the pixel array and connected to pixels in the pixel array, and power supply pad connected to the first joint portion. The second substrate includes readout circuit to read signal from the pixel array via signal line, and second joint portion jointed to the first joint portion. The readout circuit includes limiter circuit to limit amplitude of potential of the signal line. Power supply terminal of the limiter circuit is connected to the second joint portion, and power supply potential applied to the power supply pad is supplied to the pixels and supplied to the power supply terminal of the limiter circuit via the first and second joint portions.


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