The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2022

Filed:

Mar. 04, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hyewon Kim, Hwaseong-si, KR;

Eunjung Kim, Daegu, KR;

Geumjung Seong, Seoul, KR;

Jay-Bok Choi, Yongin-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10897 (2013.01); H01L 21/76229 (2013.01); H01L 21/76232 (2013.01); H01L 27/10847 (2013.01); H01L 27/10814 (2013.01); H01L 27/10823 (2013.01);
Abstract

A semiconductor device includes a substrate including a cell region, a peripheral region, and a boundary region therebetween, a cell device isolation pattern on the cell region of the substrate to define cell active patterns, a peripheral device isolation pattern on the peripheral region of the substrate to define peripheral active patterns, and an insulating isolation pattern on the boundary region of the substrate, the insulating isolation pattern being between the cell active patterns and the peripheral active patterns, wherein a bottom surface of the insulating isolation pattern includes a first edge adjacent to a side surface of a corresponding one of the cell active patterns, and a second edge adjacent to a side surface of a corresponding one of the peripheral active patterns, the first edge being at a height lower than the second edge, when measured from a bottom surface of the substrate.


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