The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 30, 2022
Filed:
Jul. 30, 2018
Applicant:
Melexis Technologies NV, Tessenderlo, BE;
Inventor:
Darrell Livezey, Brookline, NH (US);
Assignee:
MELEXIS TECHNOLOGIES NV, Tessenderlo, BE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 27/00 (2006.01); G11C 27/02 (2006.01); G01S 7/4863 (2020.01); G01S 7/4861 (2020.01); G01S 17/10 (2020.01);
U.S. Cl.
CPC ...
G11C 27/024 (2013.01); G01S 7/4861 (2013.01); G01S 7/4863 (2013.01); G01S 17/10 (2013.01);
Abstract
A sample-and-hold circuit is provided that includes a plurality of sample-and-hold branches arranged in parallel and each including a buffer and a sample-and-hold block including one or more sample-and-hold cells. The sample-and-hold circuit further includes a clock and timing circuit arranged for setting an adaptable time delay to enable sampling and sampling phase for each sample-and-hold block. The time delay of at least one sample-and-hold block can be set to value bigger than one sampling clock period.