The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 30, 2022
Filed:
Dec. 03, 2018
Applicant:
Hewlett-packard Development Company, L.p., Spring, TX (US);
Inventors:
Stephen D. Panshin, Corvallis, OR (US);
Jefferson P. Ward, Corvallis, OR (US);
Scott A. Linn, Corvallis, OR (US);
James Michael Gardner, Corvallis, OR (US);
Assignee:
Hewlett-Packard Development Company, L.P., Spring, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/42 (2006.01); B41J 2/175 (2006.01); G06F 9/30 (2018.01); G06F 21/44 (2013.01); G06F 21/62 (2013.01); G06F 21/74 (2013.01); G06F 21/85 (2013.01); H04L 9/08 (2006.01); H04L 9/32 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4282 (2013.01); B41J 2/17556 (2013.01); G06F 9/30105 (2013.01); G06F 21/44 (2013.01); G06F 21/62 (2013.01); G06F 21/74 (2013.01); G06F 21/85 (2013.01); H04L 9/0819 (2013.01); H04L 9/3242 (2013.01); B41J 2202/13 (2013.01); B41J 2202/20 (2013.01);
Abstract
In an example, a logic circuitry package has a first address and comprises a first logic circuit. In some examples, the first address is an I2C address for the first logic circuit, and the package is configured such that, in response to a first command indicative of a task and a first time period sent to the first address, the first logic circuit is to, for a duration of the time period, perform a task, and disregard I2C traffic sent to the first address.