The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 23, 2022
Filed:
Jan. 31, 2020
Inphi Corporation, Santa Clara, CA (US);
Mario A. Castrillon, Santa Clara, CA (US);
Damián A. Morero, Santa Clara, CA (US);
Genaro Bergero, Santa Clara, CA (US);
Cristian Cavenio, Santa Clara, CA (US);
Teodoro Goette, Santa Clara, CA (US);
Martin Asinari, Santa Clara, CA (US);
Ramiro R. Lopez, Santa Clara, CA (US);
Mario R. Hueda, Santa Clara, CA (US);
Marvell Asia Pte Ltd., Singapore, SG;
Abstract
A method and device for energy-efficient decoders. The decoder device can include a plurality of decoder modules configured to process an input data signal having a plurality of forward error correction (FEC) codewords. This plurality of decoder modules can include at least a first decoder followed by a second decoder. The first decoder can be low-power to first eliminate most of the errors of the codewords and the second decoder can be high-performance to correct the remaining errors. Alternatively, the first decoder can be high-performance to correct the codewords until the low-power decoder can correct the remaining errors. A classifier module can be included to determine portions of the codewords to be directed to any one of the plurality of decoder modules. These implementations can be extended to use additional decoders with different decoding algorithms and optimized to maximize decoder performance given a maximum power constraint.