The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 23, 2022
Filed:
Sep. 30, 2020
Nxp B.v., Eindhoven, NL;
Domenico Liberti, San Jose, CA (US);
Andre Gunther, San Jose, CA (US);
Jeffrey Alan Goswick, Phoenix, AZ (US);
NXP B.V., San Jose, CA (US);
Abstract
An n-well voltage switching circuit () and methodology are disclosed for generating a maximum bias voltage (V) at the output voltage node with cross-coupled PMOS switching transistors () connected to a voltage supply remapping circuit () which receives first and second power supplies (V, V) and generates first and second gate driving signals (G, G), wherein the first and second gate driving signals are connected, respectively, to the gates of the first and second cross-coupled PMOS transistors (P, P) to pull a gate for one of the cross-coupled PMOS transistors to ground so that the higher of the first and second power supplies is coupled to the output voltage node over one of the first and second cross-coupled PMOS transistors, thereby generating a maximum bias voltage at the output voltage node.