The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 2022

Filed:

Jun. 29, 2020
Applicant:

Rfhic Corporation, Anyang-si, KR;

Inventor:

Won Sang Lee, Chapel Hill, NC (US);

Assignee:

RFHIC Corporation, Anyang-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 29/20 (2006.01); H01L 21/768 (2006.01); H01L 29/205 (2006.01); H01L 29/267 (2006.01); H01L 29/66 (2006.01); H01L 29/16 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 29/2003 (2013.01); H01L 21/0254 (2013.01); H01L 21/02378 (2013.01); H01L 21/02488 (2013.01); H01L 21/02527 (2013.01); H01L 21/76871 (2013.01); H01L 21/76897 (2013.01); H01L 24/94 (2013.01); H01L 29/1602 (2013.01); H01L 29/205 (2013.01); H01L 29/267 (2013.01); H01L 29/66462 (2013.01);
Abstract

A method for fabricating a semiconductor wafer is provided, where the semiconductor wafer includes a diamond layer and a semiconductor layer having III-Nitride compounds. The method includes the steps of: disposing a nucleation layer on a SiC substrate and disposing at least one semiconductor layer on the nucleation layer, the at least one semiconductor layer including a III-Nitride compound. The method further includes the steps of: disposing a protection layer on the at least one semiconductor layer; bonding a carrier wafer to the protection layer, the carrier wafer including a SiC substrate; removing the substrate, the nucleation layer and a portion of the at least one semiconductor layer; disposing a diamond layer on the at least one semiconductor layer; depositing a substrate wafer on the diamond layer; and removing the carrier wafer and the protection layer.


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