The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 2022

Filed:

Mar. 31, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Byounggon Kang, Seoul, KR;

Taejun Yoo, Suwon-si, KR;

Seunghyun Yang, Bucheon-si, KR;

Dalhee Lee, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11 (2006.01); G11C 11/41 (2006.01); G11C 11/412 (2006.01); G11C 11/417 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1104 (2013.01); G11C 11/412 (2013.01); G11C 11/417 (2013.01); H01L 23/5286 (2013.01); H01L 27/1108 (2013.01);
Abstract

A semiconductor device is provided. The semiconductor device includes power supply lines extending in a first direction; first transistors, each of which is formed in a first region and has a first threshold voltage; and second transistors, each of which is formed in a second region and has a second threshold voltage higher than the first threshold voltage. One of the plurality of power supply lines is interposed between the first region and the second region, the first transistors implement a first portion of a multiplexer, a clock buffer and a first latch that are disposed on a data path, the second transistors implement a second portion of the multiplexer circuit and a second latch that are disposed on a feedback path, and the first portion of the multiplexer circuit and the second portion of the multiplexer circuit are disposed in a common location along the first direction.


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