The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 2022

Filed:

Nov. 18, 2019
Applicants:

SK Hynix Inc., Gyeonggi-do, KR;

Seoul National University R&db Foundation, Seoul, KR;

Inventors:

Deog-Kyoon Jeong, Seoul, KR;

Han-Gon Ko, Seoul, KR;

Chan-Ho Kye, Seoul, KR;

So-Yeong Shin, Gyeonggi-do, KR;

Assignees:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01); G11C 7/10 (2006.01); H03L 7/081 (2006.01); H03L 7/197 (2006.01);
U.S. Cl.
CPC ...
G11C 7/222 (2013.01); G11C 7/1006 (2013.01); G11C 7/1066 (2013.01); G11C 7/1093 (2013.01); H03L 7/0814 (2013.01); H03L 7/1974 (2013.01);
Abstract

An integrated circuit includes: a first path suitable for transferring an input signal from a first point to a second point; a second path suitable for transferring the input signal from the second point to a third point; a first phase comparator suitable for comparing an edge of the input signal at the first point with an edge of the input signal at the second point; and a second phase comparator suitable for comparing an edge of the input signal at the second point with an edge of the input signal at the third point, wherein the first path includes a first delay circuit whose delay value is adjusted based on a comparison result of the first phase comparator, and the second path includes a second delay circuit whose delay value is adjusted based on a comparison result of the second phase comparator.


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