The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 2022

Filed:

Dec. 14, 2020
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Yasuhito Yoshimizu, Yokkaichi, JP;

Takashi Fukushima, Yokkaichi, JP;

Tatsuro Hitomi, Yokohama, JP;

Arata Inoue, Chigasaki, JP;

Masayuki Miura, Yokkaichi, JP;

Shinichi Kanno, Ota, JP;

Toshio Fujisawa, Yokohama, JP;

Keisuke Nakatsuka, Kobe, JP;

Tomoya Sanuki, Yokkaichi, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/1009 (2016.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0619 (2013.01); G06F 3/064 (2013.01); G06F 3/0688 (2013.01); G06F 12/0246 (2013.01); G06F 12/1009 (2013.01);
Abstract

According to one embodiment, a storage device includes a stage on which a semiconductor wafer can be mounted, wherein data is capable of being read from the semiconductor wafer or data is capable of being written to the semiconductor wafer. The storage device further includes a plurality of probe pins for reading or writing data, and a controller connected the probe pins. The semiconductor wafer includes electrodes connectable to the probe pins, a first memory area that can store user data, and a second memory area that can store identification information for identification of the semiconductor wafer and a check code for checking integrity of the identification information. The controller is capable of reading the identification information and the check code from the second memory area.


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