The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2022

Filed:

Jul. 02, 2019
Applicant:

Orange, Issy-les-Moulineaux, FR;

Inventors:

Emna Mezghani, Chatillon, FR;

Marc Douet, Chatillon, FR;

Assignee:

ORANGE, Issy-les-Moulineaux, FR;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 41/5041 (2022.01); H04W 4/70 (2018.01); G06F 8/61 (2018.01); G06N 5/02 (2006.01); H04L 41/042 (2022.01); H04L 41/0893 (2022.01); H04L 41/5006 (2022.01); H04L 41/5019 (2022.01); H04L 67/125 (2022.01); G06F 16/28 (2019.01); G06F 9/52 (2006.01);
U.S. Cl.
CPC ...
H04L 41/5041 (2013.01); G06F 8/61 (2013.01); G06F 9/52 (2013.01); G06F 16/285 (2019.01); G06N 5/022 (2013.01); G06N 5/025 (2013.01); H04L 41/042 (2013.01); H04L 41/0893 (2013.01); H04L 41/5006 (2013.01); H04L 41/5019 (2013.01); H04L 67/125 (2013.01); H04W 4/70 (2018.02);
Abstract

A method for coordinating a plurality of device management servers, the plurality of device management servers including at least a first management server and a second management server. The method includes: receiving a first instruction for a first device connected to the first management server; receiving a second instruction for a second device connected to the second management server; obtaining information concerning dependency between the first and second devices; based on the dependency information and rules for coordinating the execution, determining an order of execution of the first instruction and second instruction; generating and sending a first control signal for executing the first instruction and a second control signal for executing the second instruction according to the determined order.


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