The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2022

Filed:

Jul. 15, 2021
Applicant:

Mediatek Singapore Pte. Ltd., Singapore, SG;

Inventors:

Hugh Thomas Mair, San Jose, CA (US);

Ashish Kumar Nayak, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/099 (2006.01); G06F 1/324 (2019.01); H03L 7/081 (2006.01);
U.S. Cl.
CPC ...
H03L 7/099 (2013.01); G06F 1/324 (2013.01); H03L 7/081 (2013.01);
Abstract

Clock circuits designed to compensate for supply voltage fluctuations (e.g., supply voltage droops) in central processing units (CPUs) are described. The clock circuits described herein involve reducing the clock frequency in response to a decrease to the supply voltage to a value that is approximately equal (or below) to the maximum operating frequency of the CPU at that particular supply voltage. The clock circuits described herein may include a frequency locked loops (FLL). Such FLLs may be designed to lock to a reference frequency when the supply voltage is approximately constant and to deviate from the reference frequency in response to variations in the supply voltage. In some embodiments, an FLL operates in the same supply voltage domain as the CPU.


Find Patent Forward Citations

Loading…